Overview

Techniques to achieve high-performance computing, including advanced architectural features and highly parallel processors. Techniques for improving processor, memory subsystem, and I/O subsystem performance, including pipelining, memory interleaving, multi-level caching, and parallel I/O. Parallel computer models, scalability, and clustering. Parallel programming, the role of the compiler, and compiler parallelization techniques. Performance metrics, evaluation, and comparisons between parallel processors. Enabling technologies for highly parallel computers, including the use of microprocessors and field-programmable gate arrays. Distributed memory. Processor/cluster interconnection networks. Advanced implementation technologies and techniques, including reconfigurable computing. Military applications of high-performance computers and parallel processors.

Included in Degrees & Certificates

• 286

Prerequisites

• EC3800
• EC3820
• EC3830
• EC3840

Learning Outcomes

• Given the specifications for a pipelined processor, be able to design and analyze the hardware necessary to implement pipelined instruction execution using reservation stations, the Tomasulo algorithm, or register renaming.
• Given specifications for a high-performance arithmetic unit, be able to design and analyze single-function and reconfigurable arithmetic pipelines.
• Given the requirements for a high-performance memory subsystem, the student will be able to design and analyze a memory system using techniques such as interleaving and multi-level caching.
• Given the requirements for a high-performance I/O subsystem, be able to design a parallel I/O system and evaluate it for performance and reliability.
• Given the specifications for an advanced processor, be able to classify the architecture and develop a model of it.
• Understand the issues of scalability and clustering as they apply to highly parallel computer architectures.
• Understand the application of FPGAs in reconfigurable computer architectures.
• Understand the roll of compilers in parallel processing and have knowledge of compiler parallelization techniques.
• The student will understand the roll of compilers in reconfigurable computing and have knowledge of reconfigurable computer programming techniques.
• Given one or more high performance computers, the student will be able to design, conduct, and analyze the results of experiments for measuring performance and will be able to compare and contrast results from different computers.
• The student will understand enabling technologies for high performance processors, including advanced microprocessors, RISC, VLIW processors, and FPGAs, and how such technologies influence the architectures of advanced processors.
• Given the memory requirements for a parallel processor, the student will be able to design and analyze a distributed memory system.
• Given the processor/cluster interconnection requirements for a parallel processor, the student will be able to select an appropriate network and to analyze the performance and reliability.
• Understand the influence of advanced implementation technologies such as wafer scale integration and III/V semiconductor logic on high-performance processor architectures.
• Understand the application of advanced implementation techniques and CAD tools for parallel processors.